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  fig 1. typical on-resistance vs. gate voltage fig 2. maximum drain current vs. case temperature benefits  improved gate, avalanche and dynamic dv/dt ruggedness  fully characterized capacitance and avalanche soa  enhanced body diode dv/dt and di/dt capability  lead-free  rohs compliant containing no lead, no bromide, and no halogen applications  brushed motor drive applications  bldc motor drive applications  pwm inverterized topologies  battery powered circuits  half-bridge and full-bridge topologies  electronic ballast applications  synchronous rectifier applications  resonant mode power supplies  or-ing and redundant power switches  dc/dc and ac/dc converters d-pak IRFR7440trpbf 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 100 120 140 160 180 i d , d r a i n c u r r e n t ( a ) limited by package 4 8 12 16 20 v gs , gate-to-source voltage (v) 0 2 4 6 8 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) t j = 25c t j = 125c i d = 90a d s g v dss 40v r ds(on) typ. 1.9m max. 2.4m i d (silicon limited) 180a i d (package limited) 90a   
  i-pak irfu7440trpbf ordering information form quantity IRFR7440pbf d-pak tube/ bulk 75 IRFR7440pbf IRFR7440trpbf d-pak tape and reel 2000 IRFR7440trpbf irfu7440pbf i-pak tube/ bulk 75 irfu7440pbf orderable part number package type standard pack complete part number IRFR7440pbf IRFR7440trpbf irfu7440pbf 2014-8-16 1 www.kersemi.com
   calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 90a. note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements.  
     repetitive rating; pulse width limited by max. junction temperature.   limited by t jmax , starting t j = 25c, l = 0.04mh r g = 50 , i as = 90a, v gs =10v.  i sd 100a, di/dt 1306a/ s, v dd v (br)dss , t j 175c.   pulse width 400 s; duty cycle 2%.   c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1" square pcb (fr-4 or g-10 material). for recom mended footprint and soldering techniques refer to application note #an-994.
  
   
  !"  this value determined from sample failure population, starting t j = 25c, l= 0.04mh, r g = 50 , i as = 90a, v gs =10v. static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 40 ??? ??? v v (br)dss / t j breakdown voltage temp. coefficient ??? 28 ??? mv/c r ds(on) static drain-to-source on-resistance ??? 1.9 2.4 m 2.8 ??? m v gs(th) gate threshold voltage 2.2 3.0 3.9 v i dss drain-to-source leakage current ??? ??? 1 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 r g internal gate resistance ??? 2.6 ??? conditions v gs = 0v, i d = 250 a  reference to 25c, i d = 1ma v gs = 10v, i d = 90a  v ds = 40v, v gs = 0v v ds = 40v, v gs = 0v, t j = 125c v gs = 20v v gs = -20v v gs = 6.0v, i d = 50a  v ds = v gs , i d = 100 a absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery  v/ns t j operating junction and t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) avalanche characteristics e as (thermally limited) single pulse avalanche energy  mj e as (tested) single pulse avalanche energy tested value  i ar avalanche current a e ar repetitive avalanche energy mj thermal resistance symbol parameter typ. max. units r 8 jc junction-to-case  ??? 1.05 r 8 ja ??? 50 r 8 ja junction-to-ambient  ??? 110 max. 180  125  760 90 220 -55 to + 175 20 0.95 see fig 15,16, 23a, 23b junction-to-ambient (pcb mount) a c 300 140 4.4 160 c/w IRFR7440pbf irfu7440pbf 2014-8-16 2 www.kersemi.com
s d g dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 280 ??? ??? s q g total gate charge ??? 89 134 nc q gs gate-to-source charge ??? 26 ??? q gd gate-to-drain ("miller") charge ??? 26 ??? q sync total gate charge sync. (q g - q gd ) ??? 63 ??? t d(on) turn-on delay time ??? 11 ??? ns t r rise time ???39??? t d(off) turn-off delay time ??? 51 ??? t f fall time ??? 34 ??? c iss input capacitance ??? 4610 ??? pf c oss output capacitance ??? 690 ??? c rss reverse transfer capacitance ??? 460 ??? c oss eff. (er) effective output capacitance (energy related) ??? 855 ??? c oss eff. (tr) effective output capacitance (time related) ??? 1210 ??? diode characteristics symbol parameter min. typ. max. units i s continuous source current ??? ??? 180 a (body diode) i sm pulsed source current ??? ??? 760 a (body diode)  v sd diode forward voltage ??? 0.9 1.3 v t rr reverse recovery time ??? 34 ??? ns t j = 25c v r = 34v, ???35??? t j = 125c i f = 90a q rr reverse recovery charge ??? 33 ??? nc t j = 25c di/dt = 100a/ s  ???34??? t j = 125c i rrm reverse recovery current ??? 1.8 ??? a t j = 25c v dd = 20v i d = 90a, v ds =0v, v gs = 10v i d = 30a r g = 2.7 conditions v gs = 10v  v gs = 0v conditions v ds = 10v, i d = 90a i d =90a v ds =20v v gs = 10v  v ds = 25v ? = 1.0 mhz, see fig. 5 v gs = 0v, v ds = 0v to 32v  see fig. 12 v gs = 0v, v ds = 0v to 32v  t j = 25c, i s = 90a, v gs = 0v integral reverse p-n junction diode. mosfet symbol showing the IRFR7440pbf irfu7440pbf 2014-8-16 3 www.kersemi.com
fig 3. typical output characteristics fig 5. typical transfer characteristics fig 6. normalized on-resistance vs. temperature fig 4. typical output characteristics fig 8. typical gate charge vs. gate-to-source voltage fig 7. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 25c 4.3v vgs top 15v 10v 7.0v 6.0v 5.5v 5.0v 4.5v bottom 4.3v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60 s pulse width tj = 175c 4.3v vgs top 15v 10v 7.0v 6.0v 5.5v 5.0v 4.5v bottom 4.3v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 90a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 20 40 60 80 100 120 q g total gate charge (nc) 0 4 8 12 16 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 32v v ds = 20v i d = 90a 2.0 3.0 4.0 5.0 6.0 7.0 8.0 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) v ds = 10v 60 s pulse width t j = 25c t j = 175c IRFR7440pbf irfu7440pbf 2014-8-16 4 www.kersemi.com
fig 10. maximum safe operating area fig 11. drain-to-source breakdown voltage fig 9. typical source-drain diode forward voltage fig 12. typical c oss stored energy fig 13. typical on-resistance vs. drain current 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 40 41 42 43 44 45 46 47 48 49 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 1.0ma 0 10 20 30 40 v ds, drain-to-source voltage (v) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 e n e r g y ( j ) 0 20 40 60 80 100 120 140 160 180 200 i d , drain current (a) 0.0 2.0 4.0 6.0 8.0 10.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ) v gs = 5.5v v gs = 6.0v v gs = 7.0v vgs = 8.0v v gs =10v 0.1 1 10 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec 100 sec dc l imited by package operation in this area limited by r ds (on) IRFR7440pbf irfu7440pbf 2014-8-16 5 www.kersemi.com
fig 14. maximum effective transient thermal impedance, junction-to-case fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 23a, 23b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 14) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) c / w 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 100 120 140 160 180 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 90a IRFR7440pbf irfu7440pbf 2014-8-16 6 www.kersemi.com
   
!"#!$%  &% fig 17. threshold voltage vs. temperature 
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%"()!$%  &% 0 200 400 600 800 1000 di f /dt (a/ s) 0 20 40 60 80 100 q r r ( n c ) i f = 90a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 20 40 60 80 100 120 q r r ( n c ) i f = 54a v r = 34v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 i r r m ( a ) i f = 90a v r = 34v t j = 25c t j = 125c -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 100 a i d = 250 a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/ s) 0 2 4 6 8 i r r m ( a ) i f = 54a v r = 34v t j = 25c t j = 125c IRFR7440pbf irfu7440pbf 2014-8-16 7 www.kersemi.com
fig 24a. switching time test circuit fig 24b. switching time waveforms fig 23b. unclamped inductive waveforms fig 23a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 25a. gate charge test circuit fig 25b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 22. +,-
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         p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period . #  $%#
& '(&))( . + - + + + - - -      #  ?      !  ?   " #$## ?        %  && ? #$##'$

   d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - v ds 90% 10% v gs t d(on) t r t d(off) t f #  ( ) 1 *  %   0.1 %   #    "*"" # + - #  #  IRFR7440pbf irfu7440pbf 2014-8-16 8 www.kersemi.com

  
 
  

 

 
  int ernational ass emb led on ww 16, 2001 in the assembly line "a" or note: "p" in assembly line position example: lot code 1234 this is an irfr120 with assembly i ndi cates "l ead- f r ee" product (optional) p = designates lead-free a = as s e mb l y s i t e code part number we e k 16 dat e code year 1 = 2001 rectifier international logo lot code as s e mb l y 34 12 irfr120 116a line a 34 rectifier logo irfr120 12 assembly lot code year 1 = 2001 dat e code part number week 16 "p" in ass embly line position indicates "l ead- f r ee" qual i fi cati on to the cons umer - l evel p = designates lead-free product qualified to the consumer level (optional) IRFR7440pbf irfu7440pbf 2014-8-16 9 www.kersemi.com

  
  

 

 
  
   78 line a logo international rectifier or product (opt ional) p = de s i gnat e s l e ad- f r e e a = as s e mb l y s i t e code irf u120 part number we e k 19 dat e code year 1 = 2001 rectifier international logo as s e mb l y lot code irfu120 56 dat e code part number lot code as s e mb l y 56 78 ye ar 1 = 2001 we e k 19 119a indicates lead-free" as s e mbl ed on ww 19, 2001 in the assembly line "a" note: "p" in as s embly line pos ition example: wi t h as s e mb l y this is an irfu120 lot code 5678 IRFR7440pbf irfu7440pbf 2014-8-16 10 www.kersemi.com


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